800 V DC Rack Power: Busbar Sizing, Losses and Fault Current

The feeder boundary is the regulated sending DC bus to the rack converter input. With useful IT power $P_{IT}$ and rack efficiency $\eta_{dc}$, receiving power is $P_r=P_{IT}/\eta_{dc}$. For area per pole $A=nwt$, use $\rho_T=\rho_{20}[1+\alpha_{20}(T-20)]$ and $R_{loop}=2\rho_T\ell/A+R_j$. Material properties come from the platform metals table; copper temperature correction and resistance comparisons follow Copper for Busbars, CDA/ECI, May 2014, pp. 7–9 and 62.

Solve $P_r=I(U-IR_{loop})$ using its high-voltage root. Losses are $I^2R_{loop}$ in the feeder, $P_r-P_{IT}$ in the rack converter, and $UI(1/\eta_{ac}-1)$ upstream. Grid power is $UI/\eta_{ac}$.

At permitted drop fraction $d$, $R_{allow}=d(1-d)U^2/P_r$. Conductor area must satisfy $A\ge2\rho_T\ell/(R_{allow}-R_j)$ and $A\ge P_r/[U(1-d)J_{limit}]$. The larger area sets the proposed bar count.

For a bolted rack-input fault, $R_f=R_{loop}+R_s$, $\tau=L_f/R_f$ and $i(t)=I_\infty+(I_0-I_\infty)e^{-t/\tau}$, where $I_\infty=U/R_f$. This is the Kirchhoff R–L model in OpenStax §14.4, extended to nonzero initial current. Adaptive Gauss–Kronrod quadrature integrates $i^2$ in two intervals, split at the earlier of interruption and 20 circuit time constants. This resolves a fast initial decay even when the interruption horizon is much longer than the time constant. Capacitor energy is $CU^2/2$ and is not added to the current waveform.

One balanced two-wire DC feeder supplies a constant-power load on its high-voltage branch. All bars have rectangular cross-sections, equal length, equal temperature and equal current sharing. Material resistivity is linear with temperature; the input temperature is prescribed. Joint resistance is the total effective operating-temperature value for both poles and remains fixed when proposed bar count changes.

Efficiencies are constant at the entered operating point and through the load sweep; choose new efficiencies when changing load. Normal-operation sending voltage is regulated, so source fault resistance is applied only in the fault model. That model uses a stiff voltage source, fixed resistance and inductance, no current limiting, and either the normal feeder current or zero as its initial current. No current after interruption is calculated. Sizing equations and the nonzero-current extension are derived here from circuit laws.

Electrical sizing and fault screening for 1–1500 V DC, 20–150 °C conductors, and the entered geometric ranges. Copper and aluminium reference grades do not represent every alloy or temper. Current density is a chosen design target, not a thermal rating; confirm allowable temperature and sharing separately. A missing voltage-drop area means joints alone consume the available resistance budget.

Fault results are the source contribution for the stated R–L equivalent. They are neither the total available fault current nor an upper bound: capacitor discharge, batteries, multiple feeds, arcs and converter behavior may change the duty substantially. A lower conductor temperature raises available current. The current-squared integral is not a protective device's certified let-through value. Confirm actual DC interruption, recovery voltage, time constants, thermal and mechanical withstand, earthing and insulation coordination with equipment data and the standard in force.