Flyback Converter Design Calculator

The power-stage equations follow onsemi/Fairchild AN4137, printed pp. 3–8 (attached pp. 5–10), TI SSZTCW6 equations 1–10 and 23–27, and Vishay AN730. Core reluctance and copper-window equations use the same first-principles method as the catalog's power-inductor and transformer calculators; the bridge-transformer excitation law does not apply to a flyback.

With $P=P_o/\eta$, $n=N_p/N_s$, $V_R=n(V_o+V_f)$ and frequency $f$, the fixed-transformer operating solution is

At a reduced load, replace $P$ by the selected load fraction times $P$. The secondary interval is $D_2=\min(1-D,V_{in}D/V_R)$. Then $\Delta I=V_{in}D/(L_pf)$, $I_{val}=\max(0,P/(V_{in}D)-\Delta I/2)$ and $I_{pk}=I_{val}+\Delta I$. The primary RMS integral is

The mode transition is solved explicitly rather than imposing the sizing mode at every input voltage.

For sizing at minimum input and rated load, DCM uses $D_2=1-D-x$ for idle fraction $x$, and CCM uses $D_2=1-D$. Thus $n=V_{in,min}D/[(V_o+V_f)D_2]$. Set $K=1$ in DCM or the chosen $K_{RF}=\Delta I/(2I_{mean})$ in CCM:

Current estimates and loss allocation. Primary quantities are conservative sizing estimates using $P_o/\eta$. A direct secondary referral gives conservative rating envelopes $nI_{pk}$ and $nI_{p,rms}\sqrt{D_2/D}$. For the secondary waveform and capacitor RMS estimate, multiply referred pulses by $k_s=\eta(V_o+V_f)/V_o$ to make their average equal the specified output current. This is an explicit engineering loss allocation, not an exact instantaneous coupled-inductor solution. The efficiency condition ensures $k_s\leq1$. Winding copper sizing uses the conservative envelopes; capacitor RMS uses the load-normalized waveform.

Magnetics. $B_{pk}=L_pI_{pk}/(N_pA_e)$; automatic turns round $L_pI_{pk,max}/(A_eB_{allow})$ upward. The total reluctance gap is

It includes finite core reluctance through ungapped $A_{L0}$ and excludes fringing. Copper area per turn is RMS current divided by chosen current density; sum both winding turn-areas and divide by usable fill to estimate the window.

RCD clamp. AN4137 equations 26–31 set $V_c=k_cV_R$ at low line, $P_{sn}=fL_{lk}I_{pk}^2V_c/[2(V_c-V_R)]$, $R_{sn}=V_c^2/P_{sn}$ and $C_{sn}\geq1/(R_{sn}fr_c)$. With that resistor fixed, solve the quadratic clamp voltage at each full-load line point and at the selected input/load point. Compare diode plus clamp dissipation with the corresponding full-load or load-scaled loss budget. Drain stress is the maximum of input plus clamp voltage, sampled at 41 line points. The voltage-rating multiplier is then applied. The ideal waveform omits the short clamp event.

Waveform rendering. Linear current ramps and ideal voltage plateaus use exact switching breakpoints. Repeated cycle positions retain the values on both sides of each jump, including the next-cycle turn-on. This preserves analytical peaks and pulse areas even for very short conduction intervals. Animation evaluates current and voltage analytically at a periodic cycle position.

• Fixed switching frequency, steady regulated output, one non-synchronous secondary and linear magnetizing inductance. Input voltages are DC; the bridge, bulk capacitor and AC-line ripple are external.
• Overall efficiency is a user estimate, constant across line and load. Primary sizing uses its loss allowance; secondary estimated waveforms use the explicit loss allocation described above. These do not resolve separate switch, winding and core losses. Rating envelopes are provided separately.
• The core and window defaults are generic design assumptions, not a claimed commercial core. Obtain geometry, ungapped inductance factor and hot flux limits from the selected core/bobbin datasheet.
• Primary normal-load peak flux sets automatic turns. Leakage is primary-referred and measured with secondary windings shorted. Gap is the total equivalent series gap, not necessarily one spacer thickness.
• RCD equations assume a fast diode, small capacitor ripple, small leakage relative to magnetizing inductance and complete reset of leakage current. Resistance/capacitance are calculated values; choose standard components and rerun with measured transformer data.

For preliminary DCM/CCM power-stage sizing and fixed-transformer checks. Results describe rated-load line sweeps and one selected operating point. With fixed power, inductance, frequency and turns ratio, primary peak current decreases as input voltage rises through CCM, then remains constant in DCM. The line sweep displays the current changes and evaluates combined input-plus-clamp voltage stress.

Integer turns do not automatically feed back into the electrical model. Enter the displayed rounded Np/Ns in existing-transformer mode, with the intended measured primary inductance, to check the practical winding. Negative gap means the requested inductance exceeds the ungapped value at the chosen turns. A window-utilization warning requires a winding redesign.

Select allowed flux below the material's hot saturation limit and check core loss separately. Effective-area flux screening can miss a smaller local core section. Copper estimates omit skin/proximity loss, fringing loss, insulation build, creepage and temperature rise. Current-limit, startup, short-circuit and overload peaks are outside the model.

The RCD voltage is above the input rail; drain stress includes both. Estimated clamp stress excludes capacitor ripple, diode recovery, stray layout inductance and ringing. Voltage multipliers are user allowances, not device qualification. RCD resistor dissipation is a thermal load; choose adequate pulse capability and power derating. Verify the clamp waveform and temperature in hardware. Loss-budget warnings check both the full-load line sweep and the selected input/load point using the fixed clamp resistor. A warning means the assumed efficiency cannot cover even the calculated diode and clamp losses; reduce the efficiency estimate or revise the clamp.

Peak current-mode control in CCM above 50% duty requires suitable slope compensation. No loop compensation, right-half-plane-zero bandwidth design, quasi-resonant behavior, active clamp, synchronous rectification, multi-output cross-regulation or safety-isolation design is included.