800 V DC Arc Flash: Capacitor Discharge and Incident Energy
Solve capacitor discharge and current-limited source contributions to a DC arc. Compare incident energy with Doan’s screen and find a clearing-time bound for 1.2 cal/cm².
This DC arc flash calculation is for engineers comparing fault locations in 800 V DC racks, power shelves and distribution busbars. It follows the capacitor discharge pulse and the continuing converter contribution, then estimates incident energy at a chosen working distance. Students can use playback to see why a large current peak and a large thermal exposure are different questions.
Enter the capacitance electrically accessible from the fault, separately for the DC link and the shelves. Include capacitor ESR and the complete outgoing and return conductor resistance and inductance in each branch. A reverse-blocking diode can make a shelf inaccessible to an upstream fault; enter zero accessible shelf capacitance in that case. The defaults illustrate a circuit and are not measurements of a particular rack.
Set the converter current limit and its path resistance. The source operates at its current limit while sufficient voltage is available, and otherwise follows its voltage-compliance limit. Its output voltage collapses during current limitation. The calculation assumes that this response is immediate; a measured overload pulse or shutdown sequence requires a corresponding source model.
Choose the electrode gap, tested electrode arrangement, exposure geometry and working distance. The Stokes–Oppenlander correlation supplies the nonlinear arc voltage, including the horizontal constant-power branch at low current. Vertical scenarios needing the separate low-current relationship are withheld until that equation is verified; a sustained high-current source without accessible capacitors is supported. Open-air exposure uses spherical energy spreading. The enclosure options use the Ammerman/Wilkins distance relationship for a panel or LV switchgear class. These classes describe reference enclosures, not every power-shelf opening or electrode jet.
Choose whether protection removes only the converter source or interrupts every path feeding the fault. Source-only clearing leaves local capacitors connected, so their discharge continues after the stated clearing time. All-path interruption assumes that a rated device diverts loop magnetic energy away from the fault. Enter total detection and interruption time, not just a trip command delay.
The results show capacitor and converter arc energy, peak current, incident energy and an evaluated clearing-time bound for 1.2 cal/cm². Exposure and clearing bounds are flagged if any contributing history exceeds the 20 kA data range. If the bound reaches the search horizon, increase that horizon before treating it as a deadline. If capacitors alone exceed the threshold, faster upstream isolation cannot meet it in this model. Local interruption, less accessible capacitance, greater distance or a different topology may be needed.
The Doan maximum-power method is included as a static comparison. Holding a capacitor's prospective bolted current constant can substantially overstate its contribution; the comparison is not a universal upper bound for current-limited sources.
This tool does not select PPE, establish permission for energized work, or model blast pressure, molten metal, shock, arc motion, restrained plasma jets, batteries or protection-device interruption physics. Installation work belongs to a qualified person. Apply NFPA 70E, 2024 edition, Annex D in its proper scope and check against the standard in force. Equipment-specific test data remain necessary for a site arc-flash assessment.
How it is calculated
Kirchhoff's laws give and for each accessible capacitor. Ideal series diodes block reverse branch current. The converter satisfies . A safeguarded Newton/bisection solver selects the larger-current stable operating point, enforces voltage compliance and accepts an unconstrained root only below a 10⁻⁷ V residual. No feasible positive root means no sustained source contribution; energy conservation alone is not an operating-point test.
Stokes–Oppenlander (1991), equations 1–2, gives above and below it for horizontal arcs. Thus the horizontal low-current voltage rises as , rather than remaining at a voltage floor. Gap is in mm and current in A. The high-current relation is shared by both tested arrangements. The separate vertical low-current equation has not been verified here; affected vertical scenarios are withheld.
Adaptive Dormand–Prince integration resolves the two nonlinear RLC branches. Stiff histories use second-order L-stable SDIRK integration. Its implicit stages bracket the shared high-current branch; on the horizontal low-current branch they solve the piecewise quadratic load-line/power intersection and choose the lower-voltage, larger-current solution. Every accepted stage satisfies its arc-voltage residual within 10⁻⁶ V. Loss of a feasible intersection causes extinction. The continuous integrator stops at 0.1 A, the bottom of the measured range; the remaining magnetic energy is assigned to the arc. No automatic restriking is simulated. The former constant-voltage analytic discharge tail has been removed.
An initiated arc needs a finite current rise from zero. A short transition-voltage trigger phase spans the RL rise to , estimated from the starting capacitor voltages; the full capacitor RLC equations still run during it. The calculation withholds capacitor cases whose resolved peak never reaches . It does not predict breakdown or ignition energy. Separate states integrate capacitor and source arc power, resistive losses and converter output energy .
Ammerman (2010), equations 12–13: and . Dimensions are mm, then converted to J/cm². Panel: mm, . LV switchgear: mm, . One cal/cm² equals 4.184 J/cm².
Source-only clearing bounds include each evaluated nonlinear capacitor tail. All-path bounds use the uninterrupted energy crossing. The current-range audit covers the protected history, the uninterrupted exposure curve and every evaluated search tail. The Doan comparison holds the initial prospective bolted current constant, uses and applies the selected exposure geometry. Capacitors contribute initial voltage divided by loop resistance; the converter contributes its limited bolted current. This screen is not an upper bound for every current-limited source. The separate Annex D expression remains for the published reference cases.
Assumptions
One initiated, free-burning arc with fixed gap; both capacitors initially at bus voltage and loop currents initially zero. Constant R, L and C. Ideal series blocking diodes in both capacitor branches prevent reverse current and recharge from the converter. Match this topology to the fault location; unblocked capacitor branches and antiparallel voltage clamps require a different circuit model. Zero capacitance removes a branch.
The converter current limit is immediate, with no overshoot, output inductance or control dynamics. Source isolation is instantaneous at the entered total clearing time. All-path interruption diverts loop magnetic energy away from this fault. All electrical arc energy enters the thermal spreading model. Enclosure class affects exposure, not arc voltage. The thermal threshold is fixed at 1.2 cal/cm².
Where it applies
Scenario analysis, not a validated 800 V rack test or PPE selection. The arc data cover gaps of 5–500 mm and currents of 0.1 A to about 20 kA. Any protected, uninterrupted or clearing-search history above 20 kA flags both the exposure and the clearing bound as extrapolated. Electrode jets, barriers and shelf vent geometry need test-supported models. Enclosure factors came from AC data and were applied to DC by Ammerman; they are not shelf-specific calibrations.
Horizontal low-current power follows the published constant-power relationship. Vertical calculations are available only for a sustained high-current source with no accessible capacitors; other vertical scenarios are blocked because equation 3 has not been verified. Do not substitute a horizontal electrode arrangement for physical vertical electrodes. The initiated-arc trigger phase is a numerical closure, not a breakdown model. Real extinction, erosion, plasma persistence and restriking can change the exposure after source isolation.
ODE relative accuracy is 10⁻⁶. Stiff source-on histories use 600 and source-off histories 400 logarithmically spaced SDIRK steps to keep default evaluation near three seconds. This retains the RLC equations but adds second-order damping and finite extinction-event timing error. Against 1200 source-off steps, incident energy differed by about 0.003% at the defaults and 0.012% in the 1 F stress case. Review the energy residual and use a refined independent study when close to the thermal limit.
Pulse-chart duration follows the LC scale and the resolved peak time. A smooth 601-point axis is merged with all adaptive or implicit solver samples in that interval, retaining peaks and switching events; curves and playback interpolate the solved history with shape-preserving interpolation. The result and clearing search do not depend on this drawing grid. Playback reuses solved histories.
The source-only search uses at most eight bracketed secant evaluations and returns the last evaluated time below threshold; this can leave unused margin. The displayed bound rounds down to 0.01 ms. A bound at the search horizon is not a maximum deadline. Settled tails are reused only when capacitor voltages agree within 10⁻⁷ of bus voltage and currents within 1 µA.
NFPA 70E 2024 Annex D supplies informative context: check against the standard in force. Schneider WP219 and Uptime Update 529 motivate architecture-aware transient analysis; this tool does not reproduce their system models. Only their public abstracts were accessible here, not the complete 2026 white paper. Cal/cm² values carry their units in labels; J/cm² supplies the convertible energy-density output.
References
- Ammerman, Gammon, Sen and Nelson (2010), DC-Arc Models and Incident-Energy Calculations, IEEE TIA 46(5), 1810–1819. https://doi.org/10.1109/TIA.2010.2057497
- Doan (2010), Arc Flash Calculations for Exposures to DC Systems, IEEE TIA 46(6), 2299–2302. https://doi.org/10.1109/TIA.2010.2077271
- NFPA 70E, Standard for Electrical Safety in the Workplace, 2024 edition, informative Annex D. https://www.nfpa.org/codes-and-standards/nfpa-70e-standard-development/70e
- Schneider Electric (2026), WP219 version 1.0, DC Arc Flash Analysis: A Practical Study on 800 VDC AI Data Centers. https://www.se.com/us/en/download/document/SPD_WP219_EN/
- Uptime Intelligence, Peter Judge, UII Update 529, 7 September 2026, 800V DC arc flash risks will depend on design. https://intelligence.uptimeinstitute.com/index.php/resource/study-arc-flash-analysis-800v-dc-systems
- Cantor, Zakielarz and Spina (2012), DC Arc Flash: The Implications of NFPA 70E 2012 on Battery Maintenance, Battcon, PDF page 8. https://www.vertiv.com/48dbdb/globalassets/documents/battcon-static-assets/2012/dc-arc-flash.-the-implications-of-nfpa-70e-2012-on-battery-maintenance.pdf
- Stokes and Oppenlander (1991), Electric arcs in open air, Journal of Physics D: Applied Physics 24, 26–35, equations 1–3. https://doi.org/10.1088/0022-3727/24/1/006
Inputs
| Input | Symbol | Unit | Default |
|---|---|---|---|
| DC bus voltage | V_dc | V | 800 |
| Accessible DC-link capacitance Include only capacitors that can feed this fault through this loop. | C_dc | mF | 30 |
| DC-link loop resistance Include capacitor ESR and both outgoing and return conductors. | R_dc | mohm | 70 |
| DC-link loop inductance | L_dc | uH | 10 |
| Accessible shelf capacitance Exclude shelves isolated from the fault by reverse-blocking devices. | C_sh | mF | 10 |
| Shelf loop resistance | R_sh | mohm | 100 |
| Shelf loop inductance | L_sh | uH | 5 |
| Converter current limit | I_lim | A | 5000 |
| Converter path resistance Use the converter-to-fault loop resistance before current limitation. | R_src | mohm | 40 |
| Electrode gap | gap | mm | 32 |
| Working distance | dist | mm | 450 |
| Total clearing time Detection plus interruption time, including any converter shutdown delay. | t_clear | ms | 5 |
| Clearing search horizon Increase this if the exposure threshold is not reached within the search. | t_window | ms | 200 |
| Elapsed time | t_show | ms | 0.3 |
| Exposure geometry | exposure | LV switchgear enclosure | |
| Protection interrupts Source-only isolation leaves both local capacitor discharge paths connected. | isolation | Converter source only | |
| Electrode arrangement Vertical scenarios with a low-current contribution are withheld until that branch is verified. | electrodes | Copper, horizontal |
Results
With the default inputs above, the calc gives:
| Result | Value |
|---|---|
| Incident energy, cal/cm² | 0.125 |
| Incident energy | 0.522 J/cm² |
| Evaluated clearing-time bound | 106.29 ms |
| Clearing requirement | Clear before the evaluated bound |
| Thermal exposure | Below thermal threshold |
| Peak arc current | 18,639 A |
| Time to peak current | 0.306 ms |
| Capacitor arc energy | 3,283.1 J |
| Source arc energy | 2,786.3 J |
| Doan comparison, cal/cm² | 0.503 |
Checked against sources
Each case below was calculated by this calc and agrees with the value from its source (within the tolerance where one is shown).
Published 130 V, 4 kA bolted case
Source: Cantor, Zakielarz and Spina, Battcon 2012, PDF page 8, calculated Ammerman and Doan columns for 130 V / 4000 A / 0.5 in. The 5.3 cal/cm² is a published model result, not a measured 800 V capacitor fault. https://www.vertiv.com/48dbdb/globalassets/documents/battcon-static-assets/2012/dc-arc-flash.-the-implications-of-nfpa-70e-2012-on-battery-maintenance.pdf
Inputs: DC bus voltage = 130 V; Accessible DC-link capacitance = 0 mF; Accessible shelf capacitance = 0 mF; Converter path resistance = 32.5 mohm; Converter current limit = 100,000 A; Electrode gap = 12.7 mm; Working distance = 304.8 mm; Total clearing time = 2,000 ms; Clearing search horizon = 2,000 ms; Exposure geometry = Open air; Protection interrupts = All paths into the fault; the others as above.
| Result | Source | This calc |
|---|---|---|
| Source-only arc operating current | 1,955 ± 2 A | 1,954 A |
| Incident energy, cal/cm² | 5.3 ± 0.04 | 5.32 |
| Doan screen, cal/cm² | 5.6 ± 0.02 | 5.597 |
Published 260 V, 2 kA bolted case
Source: Cantor, Zakielarz and Spina, Battcon 2012, PDF page 8, calculated Ammerman and Doan columns for 260 V / 2000 A / 1 in. The experimental row differs: this checks implementation of the published calculations, not empirical accuracy. https://www.vertiv.com/48dbdb/globalassets/documents/battcon-static-assets/2012/dc-arc-flash.-the-implications-of-nfpa-70e-2012-on-battery-maintenance.pdf
Inputs: DC bus voltage = 260 V; Accessible DC-link capacitance = 0 mF; Accessible shelf capacitance = 0 mF; Converter path resistance = 130 mohm; Converter current limit = 100,000 A; Electrode gap = 25.4 mm; Working distance = 304.8 mm; Total clearing time = 2,000 ms; Clearing search horizon = 2,000 ms; Exposure geometry = Open air; Protection interrupts = All paths into the fault; the others as above.
| Result | Source | This calc |
|---|---|---|
| Source-only arc operating current | 1,385 ± 2 A | 1,385 A |
| Incident energy, cal/cm² | 4.5 ± 0.06 | 4.534 |
| Doan screen, cal/cm² | 5.6 ± 0.02 | 5.597 |
Low-resistance source compliance regression
Source: Independent review reproduction: solve 0.0001 I + (20 + 0.534 × 500) I^0.12 = 800 on the high-current branch. The original clamped Newton alternated between bounds; the bracketed solution is 5102.2 A. Regression of Kirchhoff voltage compliance, not an experimental reference.
Inputs: Accessible DC-link capacitance = 0 mF; Accessible shelf capacitance = 0 mF; Converter current limit = 20,000 A; Converter path resistance = 0.1 mohm; Electrode gap = 500 mm; the others as above.
| Result | Source | This calc |
|---|---|---|
| Source-only arc operating current | 5,102 A | 5,102 A |
| source_voltage_residual | 0 ± 1 × 10⁻⁶ V | 9.209 × 10⁻¹² V |
Published horizontal constant-power branch
Source: Independent review analytical reproduction of Stokes–Oppenlander (1991), equation 2: horizontal P below 110 A is P(110 A), approximately 55.4935 kW at a 500 mm gap. Ammerman LV enclosure factors with 450 mm working distance give approximately 1.598 cal/cm² at 1.4 s and a 1.0512 s crossing. These are calculated regression values, not measured incident energies. https://doi.org/10.1088/0022-3727/24/1/006
Inputs: Accessible DC-link capacitance = 0 mF; Accessible shelf capacitance = 0 mF; Converter current limit = 75 A; Electrode gap = 500 mm; Total clearing time = 1,400 ms; Clearing search horizon = 2,000 ms; the others as above.
| Result | Source | This calc |
|---|---|---|
| Incident energy, cal/cm² | 1.598 | 1.598 |
| Evaluated clearing-time bound | 1,051 ms | 1,051 ms |
| source_voltage_residual | 0 ± 1 × 10⁻⁶ V | 0 V |
Implicit stage low-resistance source regression
Source: Independent review voltage-compliance case, with a negligible 1 nF branch to exercise the stiff implicit integrator. The 5102.2 A high-current root requires 800 V including the 0.1 mΩ path. Its 5 ms arc energy with Ammerman LV enclosure spreading at 450 mm gives 0.419562 cal/cm²; the 0.32 mJ initial capacitor energy is negligible at the stated tolerance. Circuit-law regression, not an experimental validation. https://doi.org/10.1088/0022-3727/24/1/006
Inputs: Accessible DC-link capacitance = 1 × 10⁻⁶ mF; Accessible shelf capacitance = 0 mF; Converter current limit = 20,000 A; Converter path resistance = 0.1 mohm; Electrode gap = 500 mm; DC-link loop inductance = 0.1 uH; Protection interrupts = All paths into the fault; the others as above.
| Result | Source | This calc |
|---|---|---|
| Source-only arc operating current | 5,102 A | 5,102 A |
| Incident energy, cal/cm² | 0.4196 | 0.4196 |
| Relative energy conservation error | 0 ± 1 × 10⁻⁵ | 8.913 × 10⁻¹⁶ |
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