RC, LC & Sallen-Key Filter Designer with Bode Plot
Design low-pass and high-pass RC, RL, LC and Sallen-Key filters. Select E-series components and compare Bode plots, step response and cutoff tolerance bounds.
This filter designer turns a cutoff specification into a practical starting circuit for signal conditioning, sensor interfaces, audio experiments and teaching. Use it as an RC filter calculator for a single pole, a low pass filter calculator for an LC output network, or a Sallen Key calculator when a buffered second-order response is needed. It also designs the corresponding high-pass circuits and first-order RL filters.
Choose the topology and response first. In Design from cutoff, enter the half-power frequency and a starting capacitor value; an RL design starts from a resistance instead. For LC and Sallen-Key filters, select Butterworth, Bessel, or Chebyshev response. Butterworth favors a flat magnitude response, Bessel favors the low-pass time response, and Chebyshev introduces a resonant peak. The circuit drawing identifies every component, and the component table shows the unrounded and selected values.
The target cutoff here means −3.0103 dB relative to the unity passband shelf: DC for a low-pass and the ideal high-frequency limit for a high-pass. It is different from pole frequency except for a second-order Butterworth filter. Chebyshev options specify 1 dB or 3 dB of peaking above that shelf. Their ripple-band edge is a different frequency. A high-pass Bessel design uses frequency inversion of the low-pass prototype; it does not preserve the same group-delay behavior at low frequencies.
Select preferred values independently for resistors and reactive components. Rounding can change both cutoff and Q, so inspect the recalculated results before choosing parts. The Bode magnitude and phase plots compare the selected circuit with the unrounded design over four decades. Enter an inspection frequency for an exact readout. In Analyze my components, enter existing nominal values directly; this mode does not round them.
Tolerance inputs describe independent limits on the actual components. The table reports pole-frequency and Q limits, together with conservative cutoff bounds. These are bounds rather than a statistical yield prediction. Press ▶ beside the response progress to follow the output after an ideal voltage step. High-pass output jumps initially and then returns toward zero; second-order circuits may ring.
The model assumes an ideal voltage source, linear components and a high-impedance measurement. The LC circuit includes an explicit shunt damping/load resistor. Sallen-Key designs use a unity-gain follower; the bandwidth input provides an initial adequacy screen only. Before building, check source and load impedances, inductor winding resistance and saturation, capacitor bias dependence, amplifier stability, supply headroom and slew rate. The tool does not model those effects, component availability, noise, or cascaded higher-order filters. It complements transient RLC analysis by concentrating on filter synthesis and frequency response.
How it is calculated
The plotted transfer functions are derived from impedance division and Kirchhoff's laws. With , a first-order low-pass is and its high-pass is . For RC, ; for RL, .
A second-order denominator is . The numerator is 1 for low-pass and for high-pass. Let and . The half-power cutoff is for low-pass and for high-pass. We solve this relation rather than treating pole frequency and cutoff as interchangeable.
The LC network has a series L and shunt C‖R for low-pass, or series C and shunt L‖R for high-pass. In either case, and . The resistor is the total specified shunt load.
For unity-gain Sallen-Key, . Low-pass uses , with C1 to ground and C2 feeding back from the output. High-pass uses , with R1 to ground and R2 in the feedback branch. See TI SLOA024B, attached pages 8 and 13–14. Synthesis sets equal resistors for low-pass and equal capacitors for high-pass.
Prototype Q is for Butterworth, for Bessel, 0.9565 for 1 dB Chebyshev and 1.3049 for 3 dB Chebyshev (TI SLOA049D, attached pages 11–12). Only Q is taken from those tables; this tool uses its stated half-power normalization.
Preferred-value selection minimizes the absolute logarithmic ratio to the unrounded component. E6/E12/E24 use the established mantissas; E96 uses three-significant-digit geometric values, consistent with Vishay's decade table. Tolerance bounds use the exact monotone pole-frequency limits and extrema of for Sallen-Key ratios. Combining separate pole and Q bounds conservatively encloses cutoff; these extrema need not occur together. The step response is the analytic inverse Laplace transform, including underdamped, critical and overdamped cases.
Assumptions
- All transfer equations are derived here from ideal circuit laws; published examples independently check the implementation.
- Ideal zero-impedance voltage drive. RC/RL outputs and amplifier inputs are unloaded; LC includes only the shown shunt resistor.
- Linear, lossless L and C; resistors are frequency independent. Initial capacitor voltage and inductor current are zero.
- Sallen-Key uses an ideal, unity-gain-stable voltage follower. Ground is the signal reference; single-supply bias circuitry is not synthesized.
- Tolerances are independent bounded variations about selected nominal values, with no assumed probability distribution or temperature dependence. The LC load resistor also varies by the resistor tolerance.
- First-order filters have no Q; the displayed Q entry says “Not applicable”. A 0.5 placeholder is used only by shared functions and does not change a first-order result.
- Preferred-series choice and tolerance are independent. Confirm actual product specifications and availability.
Where it applies
Use for one first- or second-order analog section in its linear small-signal range. For second-order analysis, keep Q between 0.05 and 10 so the plotted time window remains useful. A Bessel high-pass is a frequency-inverted prototype, not a guarantee of constant group delay.
The 100× gain-bandwidth-to-pole ratio is an initial engineering screen chosen for this tool, not a manufacturer guarantee. The ideal Bode curves are not bandwidth-limited. Use an actual op-amp model when the plotted frequency approaches its usable bandwidth; high-pass gain eventually rolls off, and real Sallen-Key low-pass rejection can deteriorate at high frequency.
Source resistance, additional loading, inductor DCR/ESR, self resonance, voltage-dependent capacitance, parasitics, op-amp noise, finite gain/phase, slew rate and clipping are excluded. Do not use ideal instantaneous step peaks to size amplifier slew rate. Tolerance cutoff bounds are conservative enclosures, not exact simultaneous extrema or a Monte Carlo confidence interval.
References
- Texas Instruments, Jim Karki, SLOA024B, Analysis of the Sallen-Key Architecture, September 2002, sections 3–4. https://www.ti.com/lit/an/sloa024b/sloa024b.pdf
- Texas Instruments, Jim Karki, SLOA049D, Active Low-Pass Filter Design, February 2023, Tables 9-1–9-4 and 10-1. https://www.ti.com/lit/an/sloa049d/sloa049d.pdf
- Analog Devices, A Filter Primer, September 2002, first- and second-order filter transfer functions. https://www.analog.com/en/resources/technical-articles/a-filter-primer.html
- Vishay Dale, Standard Electronic Decade Value Tables, document 31001, 04-Oct-2006. https://www.vishay.com/docs/31001/dectable.pdf
Inputs
| Input | Symbol | Unit | Default |
|---|---|---|---|
| Task | task_mode | Design from cutoff | |
| Topology | topology | Sallen-Key · unity gain | |
| Response | response | Low-pass | |
| Response shape Second-order prototypes. Chebyshev peaks above the unity passband shelf. The cutoff below is always half-power relative to that shelf. | shape | Butterworth | |
| Target 3 dB cutoff Half-power: −3.0103 dB relative to DC (low-pass) or the ideal high-frequency shelf (high-pass). | f_c | Hz | 1000 |
| Starting capacitance C1 RC: filter capacitor. Sallen-Key low-pass: capacitor to ground; high-pass: both series capacitors. | C_seed | nF | 10 |
| Starting capacitance C1 Larger capacitance reduces both the required inductance and damping resistance. | C_lc_seed | uF | 1 |
| Starting resistance R1 | R_seed | ohm | 100 |
| Resistor preferred values | r_series | E24 | |
| Capacitor / inductor preferred values Nearest value by relative ratio, independently for each part. A preferred number does not guarantee a stocked component or its tolerance. | x_series | E12 | |
| R1 LC: the shunt load / damping resistance. Sallen-Key high-pass: resistor from amplifier + input to ground. | R1_in | ohm | 11000 |
| R2 Sallen-Key low-pass: second series resistor. High-pass: feedback resistor from the capacitor junction to the output. | R2_in | ohm | 11000 |
| C1 | C1_in | nF | 10 |
| C2 Sallen-Key low-pass: feedback capacitor. High-pass: second series capacitor. | C2_in | nF | 22 |
| L1 | L1_in | mH | 10 |
| Resistor tolerance (±%) Independent symmetric limits on every resistor, including the LC load. | tol_R | 1 | |
| Capacitor tolerance (±%) | tol_C | 5 | |
| Inductor tolerance (±%) | tol_L | 10 | |
| Frequency to inspect | f_probe | Hz | 1000 |
| Input step amplitude Ideal instantaneous positive step from zero; all initial energy is zero. | V_step | V | 1 |
| Op-amp gain-bandwidth product Screening only; the plotted model uses an ideal unity-gain-stable op amp. Check bandwidth, slew rate, rails and output loading in the selected device model. | gbw | MHz | 10 |
| Step response progress 0 is the start and 1 is the end. Press ▶ for a five-second sweep; elapsed time is shown below the curve. | step_progress | 0.1 |
Results
With the default inputs above, the calc gives:
| Result | Value |
|---|---|
| Selected 3 dB cutoff | 1,020.77417 Hz |
| Cutoff shift from unrounded (%) | 2.077 |
| Selected Q | 0.7416 |
| Lower cutoff bound · tolerances | 917.58147 Hz |
| Upper cutoff bound · tolerances | 1,132.9195 Hz |
| Gain at inspection frequency (dB) | -2.818 |
| Phase at inspection frequency | -92.109 deg |
Checked against sources
Each case below was calculated by this calc and agrees with the value from its source (within the tolerance where one is shown).
TI 1 kHz Butterworth circuit
Source: TI SLOA049D Table 10-1, attached p. 13: 1 kHz Butterworth, R1 4.22 kΩ, R2 18.4 kΩ, C1 10 nF, C2 33 nF. Compare the stated cutoff and Table 9-1 Q; tolerances allow the published component rounding.
Inputs: Task = Analyze my components; R1 = 4,220 Ω; R2 = 18,400 Ω; C2 = 33 nF; the others as above.
| Result | Source | This calc |
|---|---|---|
| Selected 3 dB cutoff | 1,000 ± 10 Hz | 995 Hz |
| Selected Q; unused for first order | 0.7071 ± 0.001 | 0.7077 |
TI 1 kHz Bessel circuit
Source: TI SLOA049D Table 10-1, attached p. 13: 1 kHz Bessel, R1 7.23 kΩ, R2 14.5 kΩ, C1 10 nF, C2 15 nF. Published rounded components give a small cutoff shift. The calculator solves the half-power equation; it does not force the tabulated FSF.
Inputs: Task = Analyze my components; R1 = 7,230 Ω; R2 = 14,500 Ω; C2 = 15 nF; the others as above.
| Result | Source | This calc |
|---|---|---|
| Selected 3 dB cutoff | 1,000 ± 10 Hz | 997.1 Hz |
| Selected Q; unused for first order | 0.5773 ± 0.001 | 0.5771 |
TI 1 dB Chebyshev prototype Q
Source: TI SLOA049D Table 9-3, second-order prototype Q. TI's frequency scale uses a Chebyshev ripple-band convention; only Q is checked here. This tool independently normalizes cutoff to half power relative to the unity shelf.
Inputs: Response = High-pass; Response shape = Chebyshev · 1 dB peaking; Resistor preferred values = Unrounded; Capacitor / inductor preferred values = Unrounded; the others as above.
| Result | Source | This calc |
|---|---|---|
| Selected Q; unused for first order | 0.9565 | 0.9565 |
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